The present invention generally pertains to electronic systems for decoding coded binary data and is particularly directed to a decoding system that decodes data in accordance with the Viterbi decoding algorithm.
The Viterbi decoding algorithm is described in a paper entitled "Error Bounds for Convolutional Codes and an Asymptotically Optimum Decoding Algorithm" by Andrew J. Viterbi, published in "IEEE Transactions on Information Theory", Vol. IT-13, No. 2, April 1967, at pages 260-269. Decoders that use the Viterbi decoding algorithm for decoding coded data are known as Viterbi decoders.
The use of Viterbi decoders for decoding data that has been convolutionally coded in accordance with different fractional-rate codes and modulated for transmission by different modulation techniques is described in papers entitled "Error Control" by Joseph P. Odenwalder, published in "Data Communications, Networks, and Systems", Thomas C. Bartee, Ed. (Indianapolis: Howard W. Sams, 1985) at Chapter 10, pages 289-354; and "Development of Variable-Rate Viterbi Decoder and its Performance Characteristics" by Yutaka Yasuda, Yasuo Hirata, Katsuhiro Nakamura and Susumu Otani published in "Sixth International Conference on Digital Satellite Communications, Sept. 19-23, 1983", at pages XII-24 to XII-31.
The Viterbi decoding algorithm includes a great many processing steps, whereby the decoded-data production rate of a Viterbi decoder is limited to a given rate that may be less than the rate at which the decoded data may be processed by some data processing systems that may be coupled to the decoder.